Friday, December 5, 2008

Dr. M. Jamal Deen

Electrical and Computer Engineering
McMaster University

This presentation is divided into two parts. In the first part, several examples of research efforts in designing different low-voltage, low-power radio-frequency (RF) transceiver circuit blocks are presented. In particular, five types of circuits are described. A fully integrated, 2.4 GHz low-power, power amplifier (PA) to demonstrate the feasibility of using CMOS PAs for low-transmit power applications is discussed. Next, two types of mixers, one targeting low-voltage (0.8V) applications and another for low phase noise direct conversion receivers are described. This is then followed by two designs of ultra-wideband low noise amplifiers (LNAs) using the cascade topology and special matching and filtering circuits. The performance of an integrated low-power receiver front-end is then discussed.

The talk will also include the design of a transimpedance amplifier suitable for optical communication receivers. Detailed results of bit-error-rate versus input power will be compared to existing published results. The presentation will conclude with an overview of current research conducted on micro- and nano-systems, done in collaboration with several partners. The research includes a biophotonic imaging system, a charge-based sensing system, and an ultra-wideband imaging system – all targeting medical and/or environmental applications.

M. Jamal Deen was born in Georgetown, Guyana, South America. He completed his Ph.D. degree (1985) in Electrical Engineering and Applied Physics at Case Western Reserve University (CWRU), Cleveland, Ohio, U.S.A. Dr. Deen’s Ph.D. dissertation was on the design and modeling of a new CARS spectrometer for dynamic temperature measurements and combustion optimization in rocket and jet engines. The project was sponsored and used by NASA, Cleveland, USA. Dr. Deen is currently a Professor of Electrical and Computer Engineering at McMaster University and the holder of the Senior Canada Research Chair in Information Technology. His research interests are microelectronics/nanoelectronics and optoelectronics, and their emerging applications. Currently, he is leading or participating in several collaborative research projects on biomedical and environmental applications of nanotechnology and nanoscience.

Dr. Deen was a Fulbright Scholar from 1980 to 1982, an American Vacuum Society Scholar from 1983 to 1984, and an NSERC Senior Industrial Fellow in 1993. He was awarded the 2002 Thomas D. Callinan Award from the Electrochemical Society; a Humboldt Research Award in 2006; and has won seven best paper awards. Dr. Deen is a Distinguished Lecturer of the IEEE Electron Device Society. His research record includes more than 390 peer-reviewed articles (about 80 are invited), 14 invited book chapters and 7 awarded patents. Dr. Deen is currently an Editor of IEEE Transactions on Electron Devices, Executive Editor of Fluctuations and Noise Letters, and Member of the Editorial Boards of the Journal of Nanoelectronics and Optoelectronics, the Open Journal of Applied Physics, the Microelectronics Journal and the International Journal of High Speed Electronics and Systems.

Dr. Deen’s honors include being elected a Fellow of The Royal Society of Canada (FRSC), a Fellow of the Canadian Academy of Engineering (FCAE), a Fellow (Foreign) of the Indian National Academy of Engineering (FINAE), a Fellow of The Institute of Electrical and Electronic Engineers (FIEEE), and an Honorary Member of the World Innovation Foundation – the foundation’s highest honor.

Friday, December 5, 2008

Dr. Slim Boumaiza

Electrical and Computer Engineering
University of Waterloo

This talk will begin with a description of the main sources of nonlinear and linear distortions (termed memory effect effects), that strongly affect the quality of the signal at the output of radiofrequency high-power amplifiers (HPA), in particular, when driven with high spectral efficient, multi-carrier and wideband signals. This will be followed by an analysis of advanced dynamic nonlinear behavioural modeling methods that are devised for the prediction and/or digital predistortion of the response of wideband HPAs. Approaches for reducing the computation complexity of the identification of these models will be also described. A number of application examples of these linearization and modeling approaches to generic power amplifiers will then be presented to illustrate their capabilities.

This talk will also expound on a number of our research activities aimed at the investigation of Ultra Power Efficient and Linear Radio Transmitters suitable for Software Defined Radios.

Slim Boumaiza (S’00–M’04-SM’07) received his B.Eng. degree in Electrical Engineering from the École Nationale d’Ingénieurs de Tunis, Tunis, Tunisia, in 1997 and the M.S. and Ph.D. degrees from the École Polytechnique de Montréal, Montréal, QC, Canada, in 1999 and 2004, respectively.

From May 2005 to August 2007, Dr. Boumaiza was attached to the Electrical Engineering Department, University of Calgary, Calgary, AB, Canada, as an Assistant Professor, and a Faculty Member with the iRadio Laboratory. He is currently leading the Emerging Radio System Research Group that is conducting multidisciplinary research activities in the general areas of RF/microwave design and millimeter components, and systems for wireless communications, in the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada. Dr. Boumaiza has authored or coauthored over 80 referred journals and international conference papers. His current research interests specifically include RF/DSP mixed design of intelligent RF transmitters, design, characterization, modeling and linearization of high-power RF amplifiers, reconfigurable and multiband transceivers, and adaptive DSP.

Friday, September 19, 2008

Dr. Tara Javidi

Electrical and Computer Engineering
University of California, San Diego

In this talk, we consider the classic (cross-layer) queue-channel optimization problem for bursty and delay-sensitive information sources. In particular, we are interested in communications over outage-limited channels (with no feedback) when the number of bits that arrive at the transmitter during any time slot is random but the delivery of bits at the receiver must adhere to a strict delay constraint. In this setting, the errors experienced by the source of information, concatenated with an infinite buffer and a constant-rate outage-limited channel, are caused by either erroneous decoding at the receiver or violation of the delivery deadline. It is intuitive, then, that there is a trade off between reliability over the channel and timely delivery of information.

After briefly revisiting the difficulty in quantifying the above trade-off in its classical Shannon Theoretic context, we take advantage of the recently developed high SNR analysis of outage-limited channels to go around this difficulty. Hence, the focus of the talk becomes to characterize the error performance of the overall system in the high SNR regime. We will see that the optimal decay behavior of the asymptotic error probability depends on how fast the burstiness of the source scales down with its mean, which itself scales with SNR. We will focus on a particular scaling under which the optimal exponent of the total error probability reveals a tradeoff addressing the following classical question: How much of the delay budget and channel capacity should be utilized for gaining reliability over the channel versus accommodating the burstiness of the delay sensitive source? Time permitting, we will address the extension of this work to a multi-user scenario and the resulting many flow large deviation analysis of multi-server queuing systems with interacting service.

Tara Javidi studied electrical engineering at Sharif University of Technology, Tehran, Iran from 1992 to 1996. She received her MS degrees in electrical engineering (systems), and applied mathematics (stochastics) from the University of Michigan, Ann Arbor. Dr. Javidi received her Ph.D. in electrical engineering and computer science from the University of Michigan, Ann Arbor, in May 2002.

From 2002 to 2004, she was an assistant professor of electrical engineering at the University of Washington, Seattle. Dr. Javidi joined the University of California, San Diego, in 2005, where she is currently an assistant professor of electrical and computer engineering. Dr. Javidi was a Barbour Scholar during the 1999-2000 academic year and received an NSF CAREER Award in 2004. Her research interests are in communication networks, stochastic resource allocation, and wireless communications.

Thursday, June 19, 2008

Dr. Wei-Ping Huang

Department of Electrical & Computer Engineering
McMaster University

The surging broadband access market has propelled the development and deployment of photonics technology to a new frontier for which the efficient and cost-effective delivery of optical bandwidth to the end users becomes the focus of intensive research and development. Low-cost and high-performance optical transceivers are key components for realizing the FTTx networks based on passive optical network (PON) architectures. Currently, the technology platform for building the optical transceivers are based on discrete optoelectronic and microelectronic chips assembled on coaxial packages. Such an approach requires labor-intensive manufacture and test, which may not be readily scalable to large volume with significant cost reduction. It is long believed that Photonic/optoelectronic integration holds great promise to address these problems, but yet to be realized. In this presentation, a general overview about the system requirements and enabling technologies in the FTTx optical transceivers will be presented with focus on recent technical advancement.

Prof. Wei-Ping Huang received Ph.D degree from MIT in 1989. He is currently professor at Department of Electrical and Computer Engineering, McMaster University, Canada. Dr. Huang is internationally known for his contributions and expertise for photonic devices and integrated circuits. He has authored and co-authored over one hundred fifty (150) journal papers and eighty (80) conference papers and holds seven (7) US patents. He has also been a very successful entrepreneur who started several technology ventures and served in executive and advisory roles in various stages of the business. He is currently the Chairman of Hisense Optoelectronics Technologies Co., which is a global leader in advanced optical transceivers and subsystems for optical access networks. He is a senior member of IEEE and fellow of MIT Electromagnetics Academy. He was elected as a Cheung Kong Scholars by Ministry of Education, People’s Republic of China, and Li Ka Shing Foundation, Hong Kong in 2000.

Wednesday, June 4, 2008

Dr. John Yeow

Department of Systems Design Engineering,
University of Waterloo

The emergence of minimally invasive diagnostics and therapeutics in modern high-tech medicine has generated an unmet demand in miniaturized biomedical devices, thereby, forecasting an interesting future for clinical diagnostic and treatment instruments that are based on micro and nanotechnologies. In the past decade, micromachining technology and nanomaterials are making big impacts in many fields, especially in the field of biomedical instrumentation. The small size and low mass provided by micro/nanodevices make medical instruments portable, power efficient, and, in many cases, more effective.

This talk will focus on the development of miniaturized x-ray CT machines, endoscopic imaging devices, and biological sample preparation devices at the University of Waterloo.

John T. W. Yeow received the B.A.Sc. degree in electrical and computer engineering, and M.A.Sc. and PhD. degrees in mechanical and industrial engineering from the University of Toronto, Toronto, ON, Canada, in 1997, 1999, and 2003, respectively. He is currently a Faculty Member in the Department of Systems Design Engineering at University of Waterloo, Waterloo, ON, Canada. His current research interests are in the field of developing miniaturized biomedical instruments. He is a recipient of the NSERC Innovation Challenge Award, Douglas R. Colton's Medal of Research Excellence, Micralyne Microsystems Design Award, Ontario Ministry of Research and Innovation's Early Researcher Award, and 7T6 Early Career Award.

Wednesday, May 14, 2008

Dr. Simarjeet Singh Saini

Nanophotonics and Integrated Optoelectronics Group
Department of Electrical & Computer Engineering
University of Waterloo

Semiconductor Optical Amplifiers (SOAs) are crucial components for the success of highly functional Photonic Integrated Circuits and All-Optical Signal Processing. These versatile devices can be used for amplifying attenuated optical signals and also as non-linear elements for all optical gates. Though the promise of SOAs has been known for more than a decade, their applicability has been limited due to their performance limitations. This talk will describe work done in order to understand how SOAs work in Dense Wavelength Division Multiplexed (DWDM) networks and identify the critical parameters. Further SOA designs done to achieve improved performance will be presented. A patent pending method to optimally use the current to further improve the performance will also be discussed. SOAs applications as non-linear elements in optical logic gates will be shown with an all-optical packet header recognition network. A platform technology for monolithic integration in order to achieve monolithic integration of active and passive photonics devices will be presented. Loss-less optical switches and cross-bar switches fabricated by integrating multiple semiconductor optical amplifiers with passive waveguide fabric will be presented.

Prof. Simarjeet Saini is currently an Assistant Professor at University of Waterloo. He did his B. Tech. (Hons.) in Electronics and Electrical Communication Engineering from the Indian Institute of Technology, Kharagpur in 1996 and Ph.D. in Electrical Engineering from the University of Maryland, College Park in 2001. His thesis research led to the formation of Quantum Photonics (currently Covega) in September, 2000. From Dec. 2000 to Nov. 2004 he worked as a Lead Optoelectronics Engineer at Covega Corporation, Jessup, MD where he lead the design and development of gain chips for external cavity lasers, semiconductor optical amplifiers, super-luminescent diodes and high power lasers. In May 2004, he co-founded Altanet Communications to build fault tolerant Ethernet WDM optical systems using intelligence in the optical layer. He is currently pursuing research in tunable quantum cascade lasers, biological and chemical sensors using fiber Bragg gratings and planar wave nanophotonic circuits, plasmionic lasers, all-optical packet networks using all-optical packet header recognition, and devices and networks for WDM-PON. Dr. Saini has over 60 publications in various peer reviewed Journals and conferences, 5 US patents granted and over 5 patents applied for.

Wednesday, April 30, 2008

Professor Ted Szymanski

Bell Canada Chair in Data Communications,
McMaster University

Guaranteed-Rate Scheduling algorithms were first developed to schedule data transmissions through satellite systems, and have been used in voice-oriented circuit switches exploiting TDM, frame relay switches and optical switches. Given an NxN crossbar switch, an NxN traffic rate matrix is used to specify the required traffic rates between all pairs of input/output (IO) ports of the crossbar switch. To be admissible, no input or output port can be overloaded, and the traffic rate matrices are thus constrained to be doubly substochastic or doubly stochastic. Using some classic theorems, a doubly substochastic or stochastic rate matrix can be decomposed into a convex combination of permutation matrices. These matrices can then be scheduled using for example the Generalized Processor Sharing (GPS) algorithm to yield a transmission schedule for the crossbar switch which guarantees the traffic rates specified in the rate matrix. Recently, several low-jitter guaranteed-rate schemes have been explored for use in IP routers. One algorithm attempts to solve an NP-hard optimization problem to decompose a doubly stochastic rate matrix into a convex combination of permutation matrices, while minimizing the delay jitter between all cells in each flow, subject to the constraint of simultaneously guaranteeing the traffic rate in each flow. This talk will survey the state-of-the-art in low-jitter guaranteed-rate schemes, including the Birkoff-von Neumann algorithm developed at the University of Taiwan, the MIT quantized rate matrix algorithm, the Bell Labs/Stanford/Technion algorithm and a Recursive Fair Decomposition algorithm developed by the speaker.

Professor Ted Szymanski holds the Bell Canada Chair in Data Communications at McMaster University in Canada. He completed his Ph.D. degree at the University of Toronto, and has taught at Columbia University, NY, and McGill University, Montreal. From 1993-2003, he was an architect in a national research program on Photonic Systems funded by the Canadian Networks of Centers of Excellence program. The program brought together significant industrial and academic collaborators, including Nortel Networks, Newbridge Networks (now Alcatel), Lucent Technologies, Lockheed-Martin/Sanders, McGill University, McMaster University, the University of Toronto and Heriot-Watt University, and resulted in the demonstration of a free-space “intelligent optical backplane” exploiting emerging optoelectronic technologies. His research interests have since expanded to include network Quality of Services in support of emerging telemedicine and telerobotic control systems. He holds 2 patents and one pending in the area of networks and he has consulted for several companies. He has also served as Associate Chair (undergraduate) in the ECE Department.

Wednesday, March 5, 2008

Dr. Siva Sivoththaman

Department of Electrical and Computer Engineering,
University of Waterloo

Photovoltaic (PV) energy conversion has been one of the fastest growing fields recording more than 40% annual growth, with even stronger growth predicted for the foreseeable future. From powering communication satellites to terrestrial power grids, the PV applications are widespread. In addition to the push for the development of environmentally benign energy technologies, the multi-disciplinary R&D carried out in PV has been instrumental in bringing PV to where it is today. The semiconductor wafer-based PV technology, which is largely driven by an established industry base that continues to expand, is still reliant on greater R&D efforts for enhanced performance and cost reduction through intense research in electronic materials and efficient device architectures. On the other hand, recent advances in fine-tuned microelectronics and nanotechnologies stand to be taken advantage of by PV, enabling the latter to take new dimensions and to grow beyond what has so far been considered the fundamental performance limits. New materials and techniques to efficiently harness the full spectrum of solar photons and approaches based on nanostructured architectures can revolutionize the technology for future PV electricity. Hence the PV R&D has to play a dual role of tackling the near-future, as well as the next-next future technologies. This talk will first provide an overview of the state-of-the-art and future research directions in PV technology. Then the research activities at Waterloo on the development of advanced photovoltaic materials, devices architectures, and concepts will be highlighted.

Siva Sivoththaman (S’84, M’89, SM’98) received the PhD degree from University of Paris XII (France) in 1993. . Following his PhD, he worked as a Senior Research Engineer at the Interuniversity Micro Electronic Center (IMEC) in Belgium till 1999 and then joined the University of Waterloo in year 2000. At Waterloo he is currently a Professor at the Department of Electrical and Computer Engineering, and also the Director of the Centre for Advanced Photovoltaic Devices and Systems (CAPDS). He has published more than 90 publications in scientific journals and peer-reviewed conference proceedings covering the areas of semiconductor technology, electronic devices, and photovoltaic solar energy conversion. Dr. Sivoththaman received the CFI New Opportunities Award in 2001, the Premier’s Research Excellence Award in 2002, and has held an NSERC Industrial Research Associate Chair in RF-MEMS Technologies during 2002-2006. Dr. Sivoththaman holds senior membership in the IEEE and memberships in the Materials Research Society (MRS) and Institution of Engineers Australia (IEAust). He is also the current Chair of the Kitchener-Waterloo chapter of the IEEE Electron Devices Society.

Friday, February 29, 2008

Dr. Marie-José Montpetit

Distinguished Member of the Technical Staff
Motorola Home and Network Mobility

The increasing availability of home networks, coupled with social networking sites phenomenon and the ever-growing number of power users creates a tremendous opportunity for a paradigm change for "home networking". Technologies like DLNA enable all the devices in the "whole home" to talk among themselves, while emerging over the top networking technologies expand the reach of the "home" everywhere in the community and the world with or without reliance on traditional core network infrastructure. Home Networking started as the "Internet of Things" with phones, fridges and settop boxes communicating with light switches and security systems. It is moving seamlessly into the "Internet of Services".

This presentation will cover architectures and solutions that allow the deployment of a new type of home networks namely a community based approach intent on harnessing the power of individuals, from their technologies to their behavior.

First some concepts of current home networking technologies like DLNA, of devices like advanced home gateways and of services like whole home DVR will be presented. Then a novel architecture will be presented that targets orchestrating the different devices in the home by adding intelligence to usually dumb devices and adding self* capabilities when needed. This approach intends to move away from the "one box that does everything" approach, where a single device is overloaded with features ,into a peer network of collaborating devices that share capabilities based on service and user profiles.

Recent work on using social networking like Facebook as a generic platform for anything from video favorites to type of content to be shared will also be presented. These could profit from advanced discovery mechanisms that not only find where an end user but also include recent affective computing results. The research challenges of this approach should however not be dismissed. The "many boxes" approach means the end user is then responsible for integration and management of the peer network. Unless supported by strong middleware this limits the audience to those that want to perform these tasks and makes it difficult to sell the task as a "service". Common middleware approaches that reduce the number of platforms while keeping a diverse device ecosystem are needed as well as network based approaches related to autonomics and advanced (and user friendly) policy management. The presentation will end with a short view of the impact of these home and community networks on the video distribution and content consumption landscape.

Marie-José Montpetit got her Ph.D in Electrical and Computer Engineering from Ecole Polytechnique in Montreal. Since 2006 she is a Distinguished Member of the Technical Staff in the Technology Office of the Home and Network Mobility division of Motorola. She is the lead architect of the "Seamless Video Mobility" project that tackles the network and middleware challenges of place shifting (inside and outside the house) for multimedia in and out of the home. She is the Motorola Media Lab Resident for 2008-2009 investigating advances in social networking and peer to peer and how they impact networking (User Centric Networking & Media). She participates in the MIT Communications Future Program's studies on the impact of technology on business models using game theory. She is a contributor to IETF, ATIS IIF and TISPAN as well as a technical reviewer at the European Union. Prior to joining Motorola she held similar positions in Nokia and Teledesic. Her interests include home networking, IP video and multimedia, advanced middleware and disruptive technologies.

Thursday, February 28, 2008

Dr. Patrick Mitran

Department of Electrical and Computer Engineering,
University of Waterloo

In this talk we provide a survey of cognitive radio and results. Particularly, we first examine the motivations behind spectrum sharing and why they lead to cognitive technologies. We then look at two possible approaches to avoiding harmful interference to incumbent users: interference avoidance and interference mitigation.

In the first case, we look at efficient modulation techniques that can take advantage of spectral holes. In the second case, we survey some approaches based on interference mitigation: interference temperature, Lagrange optimization based and information theoretic dirty paper coding based. We then focus on the later and argue that cognition is a paradigm between competition and cooperation in wireless networks. Some capacity results are surveyed and we then discuss the impact of channel uncertainty on cognition.

Finally, in the last portion of this talk, we provide a brief introduction and overview of an in progress cognitive radio standard, 802.22, which aims to exploit spectral opportunities in the TV broadcast band. Here we discuss the target markets as well as some of the technical challenges associated with the TV broadcast band. An overview of the physical layer is also provided.

Patrick Mitran received the Bachelor's and Master's degrees in electrical engineering, in 2001 and 2002, respectively, from McGill University, Montreal, PQ, Canada, and the Ph.D. degree from the Division of Engineering and Applied Sciences, Harvard University, Cambridge, MA in 2006. In 2005, he interned as a research scientist for Intel Corporation in the Radio Communications Lab. In 2006-07 he was an applied mathematics lecturer in the School of Engineering and Applied Sciences, Harvard University. Since fall 2007, he is with the Department of Electrical and Computer Engineering at the University of Waterloo at the rank of Assistant Professor.

Currently he is interested in the study of cooperation and cognition in wireless networks both from an information theoretical viewpoint as well as coding theory and signal processing perspectives.

Thursday, February 21, 2008

Kelly Kanellakis

Strategic Planning and High Performance Networking Office of the CTO,
Nortel

Nortel estimates by 2010 there will be 10 devices connected to the network for every user and the network will need to support five billion connection points. We call this the era of hyperconnectivity – where anything that can be connected, and would benefit from being connected, will be connected. This explosion in the number of devices, nodes and applications connected to the network offers tremendous opportunities in terms of increased revenue for carriers, increased productivity for enterprises, and a better communications experience for all. It also presents significant challenges that will require us to fundamentally rethink the way networks and applications are built. And it’s going to require technology investment and innovation to respond to the challenge. The real question is: Where are the innovation gaps? Which technologies are foundational to accelerating the transformation of the network? Please join Kelly Kanellakis as he shares how Nortel views the opportunities presented by hyperconnectivity, and the foundational technology investments required to respond to the challenge.

Kelly Kanellakis is Leader of Strategic Planning and High Performance Networking, for the Office of the CTO at Nortel. Kelly works with Nortel’s advanced technology team to determine strategic direction and research investments to support the Nortel portfolio. He is also responsible for Nortel’s investment in External Research as well as Nortel’s work with standards development organizations and consortia. In addition, Kelly leads technology governance and audit functions for the CTO office.

Prior to joining Nortel, Kelly held a number of senior leadership positions with the telecommunications industry, including heading up the Canadian operations of start-up Blue Spruce Technologies, in the Network Access Control security field and Director of Technology in the office of the CTO at Enterasys Networks. At various points during his time at Enterasys, Kelly helped develop the Secure Networks Strategy, architected the Secure Harbour technology, was General Manager of the Worldwide Wireless business, and helped create a new R&D facility in Toronto that achieved significant R&D and product milestones.

Kelly has authored numerous white papers on a range of technology topics, hosts technology seminars and lectures on cutting-edge networking concepts, and is a frequent contributor to industry periodicals. He also participates regularly in CIO and IT discussion groups and panels. Kelly has a BA in Economics from the University of Waterloo and has attended a number of executive management programs at the Schulich School of Business at York University in Toronto.

Wednesday, February 13, 2008

Dr. Slim Boumaiza

Department of Electrical and Computer Engineering,
University of Waterloo

The constraints imposed by the new wireless communications access technologies, such as multicarrier wideband code division multiple access (MC-WCDMA) and orthogonal frequency-division multiplexing (OFDM), are becoming more and more stringent. In fact, wireless transmitters’ linearity and power efficiency are both critical design factors as they considerably affect their output signal integrity, the wireless network Capital and Operating Expenditures (Capex, Opex), and their long term reliability.

This talk will start with an overview on the power amplifiers nonlinearity effects on the output signal quality. Then, an accurate technique to characterize the PAs nonlinearity under real operation conditions will be described. A number of linearization techniques, such as feedfoward, feedback and, predistortion which have been proposed to enhance the transmitters' linearity and power efficiency tradeoff, will be described. In particular, special attention will be given to baseband digital predistortion (DPD) linearizers which are currently of particular interest since they benefit from the high-speed digital signal-processing implementation in field programmable gate arrays (FPGAs) and digital signal processors (DSPs). Several advanced DPD topologies, intended for mitigating the nonlinear behavior and the memory effects which are exhibited by multicarrier Power amplifiers (MCPA) when driven with wideband signals, will be also discussed.

The second part of the talk will be focused on advanced power amplifier schemes that have been introduced to overcome the limited power efficiency of commonly used ones. These new schemes aim at increasing the efficiency of the power amplifier, even for high output-power backoff (OPBO) values, by changing the amplifier's load according to the input signal amplitude. Among these techniques, Doherty amplifiers and linear amplification using nonlinear components (LINC) transmitters will be presented.

Finally, examples of state of the art high power efficient and linear power amplifiers realizations will be given as illustration.

Dr. Slim Boumaiza: (S'00-M'04-SM'07) received the B.Eng. degree in electrical engineering from the École Nationale d'Ingénieurs de Tunis, Tunis, Tunisia, in 1997, and the M.S. and Ph.D. degrees from the École Polytechnique de Montréal, Canada, in 1999 and 2004.

He joined recently the Electrical and Computer Engineering Department at the University of Waterloo, Canada, where he is leading the Emerging Radio System Research Group which is conducting multidisciplinary research activities in the general areas of design of RF/microwave and millimeter components and systems for wireless and satellite communications. From May 2005 to August 2007, he was with the Electrical Engineering Department, University of Calgary, Canada, as an Assistant Professor and faculty member of the Intelligent RF Radio Laboratory.

His specific current interests include RF/DSP mixed design of intelligent RF transmitters, design, characterization, modeling and linearization of high-power RF amplifiers, reconfigurable and multi-band transceivers and adaptive DSP. He has authored or coauthored over 80 refereed journal and international conferences papers.

Tuesday, January 22, 2008

Mr. Michael Butts

Ambric Inc,
Beaverton, Oregon

Ambric is an Oregon-based fabless semiconductor company. Its new platform for high-performance embedded computing and acceleration is based on an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. Its objectives are massive performance, long-term scalability, and easy development. Ambric applications, which are developed with software languages and methodologies, not hardware, include image, signal, and video processing, software defined radio, and network security.

In Ambric's Structural Object Programming Model, objects are strictly encapsulated software programs running concurrently on an asynchronous array of processors and memories. They exchange data and control through a structure of self-synchronizing asynchronous channels. Objects are combined hierarchically to create new objects, connected through the common channel interface.

The Am2045 chip, now in production, is a 130nm ASIC with 336 32-bit RISC CPUs, 336 RAM banks with access engines, and a configurable word-wide self-synchronizing channel interconnect. It delivers an order-of-magnitude increase in the throughput available from a programmable chip in a given silicon process. Applications written in Java and block diagrams compile in one minute or less. Sub-millisecond runtime reconfiguration is inherent.

Mike Butts, Ambric Fellow, is a lead hardware architect and senior technologist, with extensive experience in computer architecture and large-scale reconfigurable hardware. He co-invented FPGA-based hardware logic emulation, which spawned a market now valued at $100 million, and developed several reconfigurable chips and system products. His career was spent at companies that pioneered many fundamental electronics technologies, including Floating Point Systems, Mentor Graphics, Quickturn, Synopsys, and Cadence Design Systems, where he was named a Cadence Fellow. Prior to Ambric he was co-founder of Tabula.

Mike has 35 U.S. patents issued with additional patents worldwide and pending. A widely published author, he has served on the Technical Program Committees of the IEEE International Symposium on Field-Configurable Custom Computing Machines (FCCM); the ACM International Symposium on FPGAs; and the International Conference on Field Programmable Logic and Applications (FPL).